The present invention relates to insertion layers for thick film electraluminescent displays, and especially to a non-porous layer between the thick film dielectric layer and the phosphor in such displays.
The term xe2x80x9cnon-porousxe2x80x9d as used in this patent application means that the layer inhibits the transport of deloterious atomic species across the layer to the extent required to substantially prevent performance degradation of the electroluminscent display, and especially phosphors therein., due to migration of these species into the phosphor layer.
The present invention relates to improving the luminance and operating stability of electroluminescent display having thick film dielectric layers with a high dielectric constant. In such displays, a display pixel is addressed by applying a voltage between a selected address row and a selected address column on opposite sides of a phosphor film sandwiched between two dielectric layers, one of which is a thick film dielectric layer. The applied voltage creates an electric field across the phosphor film at the pixel located at the intersection of the selected row and column site.
A significant advantage of electroluminescent displays with thick film dielectric layers over traditional thin film electroluminescent (TFEL) displays is that the thick film high dielectric constant layer may be made sufficisntly thick to prevent dielectric breakdown. The high relative dielectric constant of the materials that are used minimizes the voltage drop across the dielectric layer when a pixel is illuminated. In order to prevent dielectric breakdown, the thick film layer is typically comprised of a sintered perovskite, piezoelectric or ferroelectric material e.g. PMN PT, with a relative dielectric constant of several thousand and a thickness greater than about 10 micrometers. PMN-PT is a material that includes lead and magnesium niobates and titanates. An additional thinner overlayer of a compatible piezoelectric material eg. lead zirocante titanate, may be applied using metal organic deposition (MOD) or sol gel techniques, to smooth the surface of the thick film for subsequent deposition of a thin film phosphor structure. The processes used to deposit the overlayer are typically practical for deposition of layers of not more than about 3 micrometers and thus are not suitable for deposition of the primary component of the thick film dielectric layer. In addition, the relative dielectric constants of the materials deposited using sot gel or MOD processes are significantly lower than that of PMN-PT, being typically less than 1000, but the dielectric breakdown strengths are comparable. The consequence is that substantially thicker layers would need to be used as the primary thick film dielectric that prevents dielectric breakdown, and this is not a practical option.
A thick film dielectric electroluminescent display is constructed on a ceramic or other heat resistant substrate. The fabrication process for the display entails first depositing a set of row electrodes on the substrate. A thick film dielectric layer is deposited on the substrate using thick film deposition techniques that are exemplified in U.S. Pat. No. 5,432,015. A thin film structure comprised of one or more thin film dielectric layers sandwiching one or more thin phosphor films is then deposited, followed by a set of optically transparent column electrodes using vacuum techniques as exemplified by published PCT patent application WO 00/70917 of Wu et al. The entire resulting structure is covered with a sealing layer that protects the thick and thin film structures from degradation due to moisture or other atmospheric contaminants. The thick film electroluminescent display structure that is obtained provides for superior resistance to dielectric breakdown as well as reduced operating voltage, compared to thin film electroluminescent (TFEL) displays. This is due to the high relative dielectric constant of the thick film dielectric materials that are used, which facilitates the use of thick layers while still permitting an acceptably low display operating voltage.
The thick film dielectric structure, when it is deposited on a ceramic substrate, will also withstand higher processing temperatures than TFEL devices, which are typically fabricated on glass substrates. The increased temperature tolerance facilitates annealing of subsequently deposited phosphor films to improve luminosity, However, even with these enhancements, thick film electroluminescent displays have not achieved the phosphor luminance and colour coordinates needed to be fully competitive with cathode ray tube (CRT) displays, particularly with recent trends in CRT specifications to higher luminance and colour temperature. Increased luminance can be realized by increasing the operating voltage, but this increases the power consumption of the displays, decreases reliability and increases the cost of driving electronics for the displays.
Increased luminance can also be achieved by using a patterned phosphor structure, instead of the traditional unpatterend white emitting phosphor systems used for TFEL displays. This reduces optical losses in the filters that are used to achieve acceptable CIE colour coordinates for red, green and blue emissions by at least partially matching the emission spectra of the phosphors to that required to achieve the needed CIE coordinates for each colour. However, such patterning requires the use of photolithographic processes to fabricate high-resolution displays. The use of photolithography for electroluminescent phosphors, as exemplified by the aforementioned published PCT patent application WO 00/70917, requires the deposition of photoresist films and the etching or lift-off of portions of the phosphor films to provide the required pattern. Deposition and removal of photoresist films and etching or lift-off of phosphor films typically requires the use of solvent-based solutions that contain water or other reactive solvents and solutes. These solutions or any residue may react with the underlying display structure, thereby degrading the performance of the completed display device. The degradation may increase if the residues of the solutions become trapped and then diffuse within the structure during subsequent phosphor annealing steps.
The performance of thick film electroluminescent displays can be enhanced by judicious choice of thin film dielectric layers used to sandwich the phosphor films used in the displays. The enhanced performance is related to the inhibition of transportation of deleterious species from the thick film structure to the thin film structure and causing degradation of phosphor performance. In addition, there is an increase in the effective surface density of electrons injected into the phosphor film under conditions appropriate to generation of light. Nevertheless, such thin film dielectric layers have limitations. If the thin film dielectric layers are made thicker so as to be more effective to inhibit diffusion of atomic species, there is an increased voltage drop across the layers relative to the voltage across the phosphor film required for electron injection into the phosphor to generate light. The increased voltage drop results in a requirement for a higher display operating voltage, the disadvantages of which have been discussed above.
A non-porous insertion layer for thick film electroluminescent displays has now been found.
Accordingly, one aspect of the present invention provides in a thick film electroluminescent display having a thick film dielectric layer and phosphor layer, the improvement comprising:
an adherent thin non-porous layer interposed between the thick film dielectric layer and the phosphor layer, said thin non-porous layer comprising a crystaline material having a crystal structure with a permanent or electric-field induced dipole moment;
said thin non-porous layer being chemically more stable with respect to the phosphor layer than the thick film dielectric layer;
said non-porous layer exhibiting reduced diffusion characteristics to atomic species than the thick film dielectric layer.
In preferred embodiments of the invention, the crystal structure does not have a centre of inversion symmetry.
In further embodiments, the non-porous layer is adjacent both the thick film dielectric layer and the phosphor layer, or the non-porous layer is adjacent to (i) a smoothing dielectric layer on the thick film dielectric layer and to (ii) the phosphor layer.
In other embodiments, the non porous layer is paraelectric, ferroelectric or anti-ferroelectric.
In still further embodiments, the non-porous layer has a relative dielectric constant of greater than 20, especially greater than 50 and in particular greater than 100.
In preferred embodiments, the non-porous layer is formed from a compound of the formula BaxSr1-x TiO3, where 0xe2x89xa6xxe2x89xa61, or BaTa2O6, especially barium titanate.
In further embodiments, the non-porous layer has a thickness of 0.05-1.0 micrometers, especially a thickness of 0.1-0.3 micrometers.
In still further embodiments of the present invention, a thin film dielectric layer is applied on the phosphor layer, especially a thin film dielectric layer that is Al2O3 or BaTiO3.
In preferred embodiments, a layer of indium tip oxide is applied over the thin film dielectric layer.